1. Field of the Invention
This invention relates to a semiconductor device.
2. Background Art
In a semiconductor device, such as a diode and IGBT (insulated gate bipolar transistor), semiconductor layers in contact with the anode electrode and the cathode electrode are highly doped with impurities to achieve good contact characteristics. When such a semiconductor device is switched on/off, migration of carriers injected and accumulated in the semiconductor layer causes voltage waveform oscillation in the semiconductor layer and switching loss.
In this regard, there is a technique for reducing carrier injection efficiency by, for instance, selectively forming trenches from the surface of the p-type emitter layer to a halfway depth and providing a main electrode so as to cover the inside of the trenches and the surface of the p-type emitter layer (see, e.g., JP-A 11-274516 (Kokai) (1999)). However, in this structure, the distance between the main electrode and the n−-base layer below the p-type emitter layer is short in the trench portion, and impurity concentration is low in the portion of the p-type emitter layer sandwiched between the n−-base layer and the main electrode. Hence, the leakage current tends to increase, leaving room for improvement.